CSS Optional — Paper-II, Section-A · Chapter 7 · 📌 Explicitly flagged in your textbook as asked in CSS 2017

The distinction is about one design decision: should instructions and data share the same memory and the same pathway to the CPU, or should they be kept separate?

⚠️ A note on the topic title. Your textbook prints "Non-Neumann," but the correct term is Von Neumann, named after mathematician John von Neumann, who described the stored-program architecture in his 1945 First Draft of a Report on the EDVAC. Use "Von Neumann" in the exam.

🗺️ Architecture Diagram — Von Neumann vs Harvard

graph TD
    subgraph VN["Von Neumann"]
        VNC["CPU"] <--> VNB["Single Shared Bus"]
        VNB <--> VNM["Unified Memory<br>Instructions + Data"]
    end
    subgraph HV["Harvard"]
        HVC["CPU"] <--> HIB["Instruction Bus"]
        HVC <--> HDB["Data Bus"]
        HIB <--> HIM["Instruction Memory"]
        HDB <--> HDM["Data Memory"]
    end

1. Von Neumann Architecture

Core idea — the stored-program concept: instructions and data are both stored in the same memory, in the same format, reachable over the same bus.

This was revolutionary. Earlier machines like ENIAC were rewired physically to change their program, taking days. Storing the program as data meant a machine could be reprogrammed in seconds — and, crucially, a program could treat another program as data, which makes compilers, assemblers, and operating systems possible.

Five classical components:

1. Memory — holds both instructions and data
2. Control Unit — fetches and decodes instructions
3. ALU — performs computation
4. Input — brings data in
5. Output — sends results out

(Control Unit + ALU + registers together form the CPU.)

The Von Neumann Bottleneck ⭐

Because there is only one bus between CPU and memory, the processor cannot fetch an instruction and read/write data in the same cycle — the two operations must be serialised.

As CPU speeds grew far faster than memory speeds, this shared pathway became the dominant limit on performance. The term was coined by John Backus in his 1977 Turing Award lecture. The entire memory-hierarchy apparatus — see Cache Memory — exists largely to mitigate this bottleneck.

A second consequence worth mentioning: because instructions and data are indistinguishable in memory, a bug or attack that overwrites data can also overwrite executable code. This is the architectural root of buffer-overflow exploits — a good security-flavoured point for an essay-style answer.

2. Harvard Architecture